A NAND flash memory chip includes a large number of memory cells in the chip thereof, converts data into electric charges, and records the data in the memory cells. The inside of the chip is divided into a plurality of memory blocks. In the memory blocks, there are units called blocks that are units of deleting data, and also there are units called pages that are formed by further dividing the block and are units of reading/writing data.
The NAND flash memory records data in accordance with its electric charge amount. Therefore, as time passes, electric charges discharge, and thus an error occurs in recorded data. To correct the data error due to the discharge of the electric charges over time, generally, an error correction encoding is performed on data to be recorded, and the data and a redundant code generated by the error correction encoding are recorded in a page. An error correction encoding using Reed-Solomon code is described in U.S. Pat. No. 5,996,105.
In recent years, with finer patterning process, in a NAND flash memory chip, the electric charge accumulated to record data is easy to discharge, and when the discharge progresses, the number of random errors increases. Therefore, to save data for a long time, a powerful error correction capability is required. However, when performing a powerful error correction, there is a disadvantage that an amount of error correction code increases.
Meanwhile, the finer patterning process influences not only the memory cells but also peripheral circuits, and hence data failure in a large data block (referred to as burst failure) such as a failure of an entire block due to a failure of an erasure control section in a block cannot be ignored.
Furthermore, as capacities of semiconductor memory devices increase, memory devices including a large number of chips therein are appearing. Therefore, the possibility that a failure as described above is present in a memory device increases dramatically.